This invention relates to low dielectric constant layers for use in various applications. The invention also relates to methods of forming low dielectric constant layers in a wide range of VLSI and ULSI fabrication operations.
As the features of microelectronic integrated circuits devices are reduced to smaller sizes, the electrical properties of the materials that constitute the devices will require change and improvement. One material that must be improved is the electrical insulator (“dielectric”) used between the wires, metal lines, and other elements of the circuit. Without improvement in the insulator material, there will be increased problems due to capacitive effects such as coupling (crosstalk) and propagation delay. The speed at which future circuits will operate will be limited by RC delay in the interconnect.
These difficulties can be mitigated by preparing the circuit using an inter-layer dielectric (“ILD”), for example an inter-metal dielectric (“IMD”), having a dielectric constant that is as low as possible. The integration of Cu metal and IMD with a low dielectric constant continues to challenge the integrated circuit industry as device size and wiring dimensions are scaled down. Low dielectric constant (k) (“low-k”), insulators, with k significantly lower than that of presently used SiO2 (3.9), are needed for reducing capacitive coupling and improving switching performance of future ULSI circuits. In this regard, the effective dielectric constant (keff) encountered by the signal in the interconnect structure is the most important parameter.
Cu/IMD integration schemes typically involve the incorporation of other materials along with the bulk inter-metal dielectric material, forming a stack. These other materials may include copper diffusion barrier, copper capping layer and hardmask (e.g., CMP and etch stop) materials needed to prevent copper poisoning of the bulk low-k dielectric, to protect the relatively soft low-k dielectric, and to facilitate the Damascene processing used in the device fabrication. These materials have a substantial impact on the effective k of the IMD stack. Thus, the IMD must meet the dual challenges of minimizing the effective k of the stack while providing material selectivity with the use of reduced k etch stop, barrier and capping materials.
Silicon nitride (SiN) provides a film having satisfactory properties as a copper diffusion barrier, but its dielectric constant is relatively high. A recently developed PECVD SiC dielectric barrier is a promising candidate to replace SiN in many copper barrier applications because of its relatively low dielectric constant (k<4.5). However, existing PECVD SiC technology has shown limitations in achieving dielectric constants lower than 4.5 while continuing to maintain other integration requirements relating to line to line leakage, via poisoning, etch selectivity, Cu hillock formation and atmospheric moisture uptake. Improved materials and processing are required.